JPH0425581B2 - - Google Patents

Info

Publication number
JPH0425581B2
JPH0425581B2 JP6036982A JP6036982A JPH0425581B2 JP H0425581 B2 JPH0425581 B2 JP H0425581B2 JP 6036982 A JP6036982 A JP 6036982A JP 6036982 A JP6036982 A JP 6036982A JP H0425581 B2 JPH0425581 B2 JP H0425581B2
Authority
JP
Japan
Prior art keywords
register
input
address
device number
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6036982A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58178433A (ja
Inventor
Junichi Kihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP6036982A priority Critical patent/JPS58178433A/ja
Publication of JPS58178433A publication Critical patent/JPS58178433A/ja
Publication of JPH0425581B2 publication Critical patent/JPH0425581B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP6036982A 1982-04-13 1982-04-13 マルチブレクサチヤネル Granted JPS58178433A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6036982A JPS58178433A (ja) 1982-04-13 1982-04-13 マルチブレクサチヤネル

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6036982A JPS58178433A (ja) 1982-04-13 1982-04-13 マルチブレクサチヤネル

Publications (2)

Publication Number Publication Date
JPS58178433A JPS58178433A (ja) 1983-10-19
JPH0425581B2 true JPH0425581B2 (en]) 1992-05-01

Family

ID=13140146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6036982A Granted JPS58178433A (ja) 1982-04-13 1982-04-13 マルチブレクサチヤネル

Country Status (1)

Country Link
JP (1) JPS58178433A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01205254A (ja) * 1988-02-10 1989-08-17 Mitsubishi Electric Corp データ処理装置
JPH0264758A (ja) * 1988-08-31 1990-03-05 Hitachi Ltd チャネルシステム

Also Published As

Publication number Publication date
JPS58178433A (ja) 1983-10-19

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